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APPARATUS AND METHOD FOR EXECUTING FAST BIT SCAN F

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专利名称:APPARATUS AND METHOD FOR EXECUTING

FAST BIT SCAN FORWARD/REVERSE(BSR/BSF) INSTRUCTIONS

发明人:Bryan Wayne Pogor申请号:US12582907申请日:20091021

公开号:US20110016296A1公开日:20110120

专利附图:

摘要:An apparatus executes a bit scan instruction that specifies an N-byte inputoperand. A first encoder forward bit scan encodes each input byte to generate N first bit

vectors. A zero detector zero-detects each input byte to generate a second bit vector. Asecond encoder forward bit scan encodes the second bit vector to generate a third bitvector. An N:1 multiplexor, controlled by the third bit vector, selects one of the N first bitvectors to output a fourth bit vector. The apparatus concatenates the third and fourth bitvectors into a fifth bit vector that indicates the bit index of the least significant set bit ofthe input operand. A third encoder forward bit scan encodes a bit-reversed version ofeach input by to generate N sixth bit vectors. A fourth encoder forward bit scan encodesa bit-reversed version of the second bit vector to generate a seventh bit vector. A secondN:1 multiplexor, controlled by the seventh bit vector, selects one of the N sixth bitvectors to output an eighth bit vector. Selection logic selects a concatenation of the thirdand fourth bit vectors into the fifth bit vector if an input indicates forward bit scan, andthe selection logic selects an inverted version of a concatenation of the seventh andeighth bit vectors into the fifth bit vector if the input indicates reverse bit scan.

申请人:Bryan Wayne Pogor

地址:Round Rock TX US

国籍:US

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