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专利名称：Method and circuit for reduced power
consumption in a charge pump circuit
发明人：Jean-Louis Bonnot申请号：US09535948申请日：20000327公开号：US06304147B1公开日：20011016
专利附图：
摘要：A charge pump circuit for use with a phase locked loop is described. The circuithas an input port for receiving a signal indicative of a misalignment between two clocksignals. It also has an output port at which a drive signal is provided. The drive signal is
provided when the comparison result is indicative of misalignment of the signals. Whenthe signals are aligned, a high impedance is provided at the output port and the chargepump circuit or a portion thereof enter a sleep mode to reduce power consumption ofthe charge pump when providing a high impedance at the output port.
申请人：KONINKLIJKE PHILIPS ELECTRONICS N.V.
代理机构：Lacasse & Associates
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